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tripath technology, inc. - technical information 1 tda2075a ? rev. 0.9/kli/10.05 tda2075a stereo class-t digital audio amplifier driver using digital power processing tm technology preliminary information revision 0.9 ? october 2005 general description the tda2075a is a two-channel, amplifier driver, that uses tripath?s proprietary digital power processing (dpp tm ) technology. the tda2075a offers higher integrat ion over previous tripath amplifiers driver chipsets while providing exceptional audio performance for real world applications. class-t amplifiers offer both the audio fidelity of class-ab and t he power efficiency of class-d amplifiers. the tda2075a is typically configured as a split-suppl y, single-ended, stereo amplifier. the tda2075a can also be configured single-supply, single-ended, st ereo amplifier, via external component choice. for applications that require bridged output drive, please refer to the tda1400. applications powered dvd players mini-compo systems audio/video amplifiers & receivers multimedia speakers benefits reduced system cost with smaller/less expensive power supply and heat sink signal fidelity equal to high quality class-ab amplifiers high dynamic range compatible with digital media such as cd and dvd features class-t architecture with proprietary dpp ?audiophile? sound quality full audio bandwidth, 20hz to 20khz high efficiency supports wide range of output power levels and output loads by changing supply voltage and external mosfets compatible with unregulated power supplies output over-current protection over- and under-voltage protection over-temperature protection 48-pin lqfp package ( datasheet : )
tripath technology, inc. - technical information 2 tda2075a ? rev. 0.9/kli/10.05 absolute maximum ratings (note 1) symbol parameter value units v5 5v power supply 6 v v logic input logic level v5 + 0.3 v v10 10v power supply 12 v t store storage temperature range -55o to 150o c vpp, vnn supply voltage (note 5) +/-70 v t a operating free-air temperature range -40o to 85o c t j junction temperature 150o c esd hb esd susceptibility ? human body model (note 2) all pins 2000 v esd mm esd susceptibility ? machine model (note 3) all pins 200 v note 1: absolute maximum ratings indicate limits beyond which damage to the device may occur. see the table below for operating conditions. note 2: human body model, 100pf discharged through a 1.5k ? resistor. note 3: machine model, 220pf ? 240pf discharged through all pins. operating conditions (note 4) symbol parameter min. typ. max. units v5 5v power supply 4.5 5 5.5 v v10 10v power supply 9 10 11 v t a operating temperature range -40 25 85 c vpp positive supply voltage (note 5) 15 65 v vnn negative supply voltage (note 5) -15 -65 v note 4: recommended operating conditions indicate conditions for which the device is functional. see electrical characteristics for guaranteed specific performance limits. note 5: the supply limitation is based on the internal over-current detection circuit. this limitation is subject to additional characterization. in addition, depending on feedback conf iguration, the tda2075a can be used in single-supply applications, in whic h case, the negative supply, vnn, is not needed. thermal characteristics symbol parameter value units ja junction-to-ambient thermal resistance (still air) tbd c/w
tripath technology, inc. - technical information 3 tda2075a ? rev. 0.9/kli/10.05 electrical charact eristics tda2075a (note 6) t a = 25 c. see application/test circuit on page 7. unless otherwise noted, the supply voltages are v5=5v, v10=10v, and vpp=|vnn|=40v. symbol parameter conditions min. typ. max. units i 5q quiescent current (mute = 0v) 50 ma i 10q quiescent current (mute = 0v) fets: fqp13n10, fqp12p10 r bbm = 20.0k ? 60 ma i vppq quiescent current (mute = 0v) fets: fqp13n10, fqp12p10 r bbm = 20.0k ? 40 ma i vnnq quiescent current (mute = 0v) fets: fqp13n10, fqp12p10 r bbm = 20.0k ? 40 ma i 5mute mute supply current (mute = 5v) 50 ma v toc over current sense voltage threshold +/-5v common mode voltage +/-40v common mode voltage tbd tbd 0.55 0.55 tbd tbd v i vppsense vppsense threshold currents over-voltage turn on (muted) over-voltage turn off (mute off) under-voltage turn off (mute off) under-voltage turn on (muted) tbd tbd 138 135 55 52 tbd tbd a a a a v vppsense threshold voltages with r vpp1 = r vpp2 = 402k ? (note 7) over-voltage turn on (muted) over-voltage turn off (mute off) under-voltage turn off (mute off) under-voltage turn on (muted) tbd tbd 55.5 54.3 22.1 20.9 tbd tbd v v v v i vnnsense vnnsense threshold currents over-voltage turn on (muted) over-voltage turn off (mute off) under-voltage turn off (mute off) under-voltage turn on (muted) tbd tbd 138 135 51 48 tbd tbd a a a a v vnnsense threshold voltages with r vnn1 = 402k ? r vnn2 = 1.2m ? (note 7) over-voltage turn on (muted) over-voltage turn off (mute off) under-voltage turn off (mute off) under-voltage turn on (muted) tbd tbd 55.5 54.3 20.5 19.3 tbd tbd v v v v note 6: minimum and maximum limits are guarant eed but may not be 100% tested. note 7: these supply voltages are calculated using the i vppsense and i vnnsense values shown in the electrical characteristics table. the typical voltag e values shown are calculated using a r vpp and r vnn values without any tolerance variation. the minimum and maximum volt age limits shown include either a +1% or ?1% (+1% for over-voltage turn on and under-vol tage turn off, -1% for ove r-voltage turn off and under-voltage turn on) variation of r vpp or r vnn off the nominal 402kohm and 1.2mohm valu es. these voltage specifications are examples to show both typical and worst case voltage ranges for the given r vpp and r vnn resistor values. please refer to the application information section for a mo re detailed description of how to calculate the over and under voltage trip voltages for a given resistor value.
tripath technology, inc. - technical information 4 tda2075a ? rev. 0.9/kli/10.05 performance characteristics t a = 25 c. unless otherwise noted, the supply volt ages are v5 = 5v, v10 = 10v, and vpp = |vnn| = 40v, the input frequency is 1khz and the measurement band width is 20khz. see a pplication/test circuit. symbol parameter conditions min. typ. max. units p out output power (continuous output) thd+n = 0.1%, r l = 4 ? thd+n = 1%, r l = 4 ? thd+n = 10%, r l = 4 ? thd+n = 0.1%, r l = 6 ? thd+n = 1%, r l = 6 ? thd+n = 10%, r l = 6 ? thd+n = 0.1%, r l = 8 ? thd+n = 1%, r l = 8 ? thd+n = 10%, r l = 8 ? 145 160 200 105 115 150 80 90 115 w w w w w w w w w thd + n total harmonic distortion plus noise p out = 60w, r l = 8 ? 0.01 % ihf-im ihf intermodulation distortion 19khz, 20khz, 1:1 (ihf), r l = 8 ? p out = 25w/channel 0.03 % snr signal-to-noise ratio a weighted, r l = 4 ? , p out = 200w/channel 104.4 db power efficiency p out = 115w/channel, r l = 8 ? 92 % a v amplifier gain p out = 10w/channel, r l = 8 ? see application / test circuit 20.09 v/v a verror channel to channel gain error p out = 10w/channel, r l = 8 ? see application / test circuit 0.5 db e nout output noise voltage a-weighted, input shorted r fbc = 10k ? , r fbb = 1.1k ? , and r fba = 1.0k ? 170 v v offset output offset voltage no load, mute = logic low 1% r fba, r fbb and r fbc resistors -1.0 1.0 v
tripath technology, inc. - technical information 5 tda2075a ? rev. 0.9/kli/10.05 tda2075a pinout fbgnd1 fbout1 ocsn1 ocsp1 gateoff bbm set v5 agnd dcmp biascap oaout2 nc nc nc ho2 agnd vppsense nc vnnsense ovrldb 19 42 41 39 38 40 37 48-pin lqfp (top view) 20 21 22 pgnd l02 agnd 24 23 nc in v1 oaout1 v5 v5 48 47 45 44 46 43 mute pgnd ho1 lo1 nc 13 14 15 16 nc nc 18 17 1 11 10 12 9 8 7 6 5 4 3 2 30 29 27 26 28 25 36 35 33 32 34 31 ocd1 v10 fbout2 fbgnd2 ocsn2 ocsp2 fault nc v5 ocd2 ref sub in v2
tripath technology, inc. - technical information 6 tda2075a ? rev. 0.9/kli/10.05 pin description pin function description 1 oaout2 output of invert ing-input stage (channel 2) 2 inv2 negative input of inverting op- amp with 2.5vdc of bias (channel 2) 3 biascap bandgap reference times two (typically 2.5vdc). used to set the common mode voltage for the input op amps. this pi n is not capable of driving external circuitry. 4 dcmp internal mode selection. this pin must be connected to 0v or 5v for proper device operation. typically, this pin is connected to v5. 5 agnd analog ground 6 v5 5 volt power supply input. 7 bbmset break-before-make timing contro l to prevent shoot-t hrough in the output mosfets. please refer to the appl ication information for additional information. 8 gateoff 10v under-voltage fault pin (requires pull-up resistor) 9, 10 ocsp1, ocsn1 over-current detect pins (channel 1) 11 fbkgnd1 ground kelvin feedback (channel 1) 12 fbkout1 negative switching feedback (channel 1) 13 pgnd power ground 15 ho1 high side gate drive output (channel 1) 17 l01 low side gate drive output (channel 1) 20 lo2 low side gate drive output (channel 2) 22 ho2 high side gate drive output (channel 2) 24 pgnd power ground 25 v10 10 volt power supply input. used for gate drive circuitry. 26 fbkgnd2 ground kelvin feedback (channel 2) 27 fbkout2 negative switching feedback (channel 2) 28, 29 ocsn2, ocsp2 over-current detect pins (channel 2) 30 fault a logic high output indicates an under-voltage (5v or 10v), over-current or over-temperature condition (requires pull-down resistor). 32 v5 5 volt power supply input. 33 ocd2 over-current detect pin (channel 2). this pin must be connected to agnd for proper device operation. 34 ref internal bandgap reference voltage; approximately 1.0 vdc. 35 ocd1 over-current detect pin (channel 1). this pin must be connected to agnd for proper device operation. 36 sub substrate (connect to agnd) 38 vnnsense negative supply voltage sense input. this pin is used for both over and under voltage sensing for the vnn supply. 39 ovrldb a logic low output indicates the in put signal has overloaded the amplifier. 40 vppsense positive supply voltage sense input. this pin is used for both over and under voltage sensing for the vpp supply. 41 agnd analog ground 42 agnd analog ground 43 v5 5 volt power supply input. 44 v5 5 volt power supply input. 45 oaout1 output of invert ing-input stage (channel 1) 46 inv1 negative input of inverting op- amp with 2.5vdc of bias (channel 1) 47 mute when set to logic high, both channels are in idle mode. when low (grounded), both channels are fully operational (connect to fault pin). 14,16,18, 19,21,23, 31,37,48 nc not connected internally. these pins may be grounded or left floating on the pcb layout.
tripath technology, inc. - technical information 7 tda2075a ? rev. 0.9/kli/10.05 application / test circuit tda2075a fault 30 14,16,18,19, 21, 23, 37, 48 fet controller v10 17 lo1 c o 0.22uf l o 11uh c z 0.22uf r z 10 ? ,2w mute ocsn1 ocsp1 9 10 v5 15 ho1 v10 r s analog ground power ground * the values of these components must be adjusted based on supply voltage range. see application information. 0 ? nc r l 4 - 8 ? vpp v5 c i 2.2uf + v5 40 vppsense 35 ocd1 33 ocd2 processing & modulation oaout1 inv1 45 46 v5 agnd 47 biascap c a 0.1uf 3 2.5v - + agnd oaout2 inv2 1 2 - + v5 agnd mute 10k v5 34 ref 8.25k, 1% c s 0.1uf 43, 44 41, 42 v5 agnd 5v *r vpp2 *r vpp1 36 sub r flt offset trim circuit r ofa 50k r ofb 470k r ofb 470k c of 0.1uf r f 20k 20k r i 7 bbmset r bbmset 20k, 1% r ref ** refer to the rb-tda2075a document for a detailed description of these optional circuits. vpp 1.0uf 1.0uf 4.7k 1.0k 150k r gs d bias q p q isp r g r isb r isa c isa g_off ckt d_is ckt c g q n r g d g d g c hbr 33uf c hbr 0.1uf + d ds d ds 150k r gs ** ** ** 1.0uf c g 1.0uf 4.7k 1.0k d bias q isn r isb r isa isa d_is ckt ** s_sup ckt s_sup ckt c s 220uf c s 0.1uf + vnn c s 220uf c s 0.1uf + c vnn v5 38 vnnsense *r vnn2 *r vnn1 c i 2.2uf + v5 agnd offset trim circuit r ofa 50k r ofb 470k r ofb 470k c of r f 20k 20k r i 4 dcmp v5 c s 0.1uf agnd v5 5v 5 6, 32 fet controller v10 20 lo2 c o 0.22uf l o 11uh c z 0.22uf r z 10 ? ,2w mute 27 fbkout2 ocsn2 ocsp2 29 28 v5 22 ho2 v10 r s 10k, 1% 1.1k r fba 1k *r fbb *r fbc 220pf c fb v5 c s 0.1uf pgnd v10 10v 13,24 25 l o vpp 1.0uf 1.0uf 4.7k 1.0k 150k r gs d bias q p q isp r g r isb r isa c isa g_off ckt d_is ckt c g q n r g d g d g c hbr 33uf c hbr 0.1uf + 150k r gs ** ** ** 1.0uf c g 1.0uf 4.7k 1.0k d bias q isn r isb r isa isa d_is ckt ** s_sup ckt s_sup ckt c s 220uf c s 0.1uf + vnn c s 220uf c s 0.1uf + c 8 gateoff 12 fbkout1 10k, 1% 1.1k r fba 1k *r fbb *r fbc 150pf c fb v5 11 fbkgnd1 10k, 1% 1.1k r fba 1k *r fbb *r fbc v5 26 fbkgnd2 10k, 1% 1.1k r fba 1k *r fbb *r fbc v5 d ds d ds r l 4 - 8 ?
tripath technology, inc. - technical information 8 tda2075a ? rev. 0.9/kli/10.05 external components description (refer to the application/test circuit) components description r i inverting input resistance to provide ac gain in conjunction with r f . this input is biased at the biascap voltage (approximately 2.5vdc). r f feedback resistor to set ac gain in conjunction with r i . please refer to the amplifier gain paragraph, in the application information section. c i ac input coupling capacitor which, in conjunction with r i , forms a high-pass filter at ) c r 2 ( 1 f i i c = . r fba feedback divider resistor connected to v5. this value of this resistor depends on the supply voltage setting and helps set the tda2075a gain in conjunction with r i, r f, r fba, and r fbc . please see the modulator feedback design paragraphs in the application information section. r fbb feedback divider resistor connected to agnd. this value of this resistor depends on the supply voltage setting and helps set the tda2075a gain in conjunction with r i, r f, r fba, and r fbc . please see the modulator feedback design paragraphs in the application information section. r fbc feedback resistor connected from either the out1 (out2) to fbkout1 (fbkout2) or pgnd1 (pgnd2) to fbkg nd1 (fbkgnd2). the value of this resistor depends on the supply voltage setting and helps set the tda2075a gain in conjunction with r i, r f, r fba, , and r fbb . it should be noted that r fbc must have a power rating of greater than ) (2r vpp p fbc 2 diss = . please see the modulator feedback design paragraphs in the application information section. c fb feedback delay capacitor that both lowers the idle switching frequency and filters very high frequency noise from the f eedback signal, which improves amplifier performance. the value of c fb should be different for channel 1 and channel 2 to minimize noise coupling between the channels. please refer to the application / test circuit. r ofa potentiometer used to manually trim t he dc offset on the output of the tda2075a. r ofb resistor that limits the dc offset trim range and allows for precise adjustment. c of capacitor that filters the manual dc offset trim voltage. r ref bias resistor. locate close to pin 34 and ground to plane with a low impedance connection to pins 41 and 42. r bbmset bias current setting resistor for the bbm setting. locate close to pin 7 and ground directly to pin 5. see application info rmation on how to determine the value for r bbm . c a biascap decoupling capacitor. locate close to pin 3 and ground to plane with a low impedance connection to pins 41 and 42. c s supply decoupling capacitor for the power pins. for optimum performance, these components should be located close to the tda2075a and returned to their respective ground as shown in the application circuit. r vnn1 main overvoltage and undervoltage sense re sistor for the negative supply (vnn). please refer to the electrical characteristic s section for the trip points as well as the hysteresis band. also, please refer to the over / under-voltage protection section in the application information for a detailed di scussion of the internal circuit operation and external component selection. when using a single power supply, this circuit can be defeated by connecting a 16k ? resistor to agnd. r vnn2 secondary overvoltage and undervoltage sense resistor for the negative supply (vnn). this resistor accounts for the internal v nnsense bias of 1.25v. nominal resistor value should be three times that of r vnn1 . please refer to the over / under- voltage protection section in the applicati on information for a detailed discussion of the internal circuit operation and external component selection. when using a single power supply, omit r vnn2 . r vpp1 main overvoltage and undervoltage sense re sistor for the positive supply (vpp). please refer to the electrical characteristic s section for the trip points as well as the hysteresis band. also, please refer to the over / under-voltage protection section in the application information for a detailed di scussion of the internal circuit operation and external component selection. r vpp2 secondary overvoltage and undervoltage sense resistor for the positive supply
tripath technology, inc. - technical information 9 tda2075a ? rev. 0.9/kli/10.05 (vpp). this resistor acco unts for the internal v ppsense bias of 2.5v. nominal resistor value should be equal to that of r vpp1 . please refer to the over / under- voltage protection section in the applicati on information for a detailed discussion of the internal circuit operation and external component selection. r s over-current sense resistor. please refe r to the section, setting the over-current threshold, in the application information fo r a discussion of how to choose the value of r s to obtain a specific current limit trip point. c hbr supply decoupling for the high current half -bridge supply pins. these components must be located as close to the output mosfets as possible to minimize output ringing which causes power supply ov ershoot. by reducing overshoot, these capacitors maximize both the tda2075a and output mosfet reliability. these capacitors should have good high frequency performance including low esr and low esl. in addition, the capacitor rati ng must be twice the maximum vpp voltage. panasonic eb capacitors are ideal for the bul k storage (nominally 33uf) due to their high ripple current and high frequency design. r g gate resistor, which is used to control t he mosfet rise/ fall times. this resistor serves to dampen the parasitics at the mosfet gates, which, in turn, minimizes ringing and output overshoots. the typical power rating is 1/2 watt. d g gate diode, which adds additional bbm and serves to match the unequal rise and fall times of q n and q p . an ultra-fast diode with a current rating of at least 200ma should be used. d bias diode that keeps the gate capacitor bi ased at the proper voltage when the supply voltage decreases. c g gate capacitor that ac-couples the tda2075a from the high voltage mosfets. r isa, r isb bias resistors for the increasing supply circuits. c isa bias capacitor for the increasing supply circuits. q isp p-channel bipolar transistor for the circuit which charges the high side gate capacitors, c g , to vpp, in the case where the vpp supply increases in magnitude. q isn n-channel bipolar transistor for the circuit which charges the low side gate capacitors, c g , to vnn, in the case where the v nn supply increases in magnitude. c z zobel capacitor, which in conjunction with r z , terminates the output filter at high frequencies. use a high quality film capacitor capable of sustaining the ripple current caused by the switching outputs. q p p-channel power-mosfet of the output stage. q n n-channel power-mosfe t of the output stage. r z zobel resistor, which in conjunction with c z , terminates the output filter at high frequencies. the combination of r z and c z minimizes peaking of the output filter under both no load conditions or with real world loads, including loudspeakers which usually exhibit a rising impedance with increasing frequency. depending on the program material, the power rating of r z may need to be adjusted. the typical power rating is 2 watts. l o output inductor, which in conjunction with c o , demodulates (filters) the switching waveform into an audio signal. forms a second order filter with a cutoff frequency of ) c l 2 ( 1 f o o c = and a quality factor of o o o l c l c r q = . c o output capacitor, which, in conjunction with l o , demodulates (filters) the switching waveform into an audio signal. forms a second order low-pass filter with a cutoff frequency of ) c l 2 ( 1 f o o c = and a quality factor of o o l c r q c l 2 o = . use a high quality film capacitor capable of sustaining the ripple current caused by the switching outputs. d ds these diodes must be connected from either the drain of the p-channel mosfet to the source of the n-channel mosfet, or the source of the p-channel mosfet to the drain of the n-channel mosfet. this diode absorbs any high frequency overshoots caused by t he output inductor l o during high output current conditions. in order for this diode to be effective it must be connected directly to the two mosfets. an ultra-fast recovery diode that can sustain the entire supply voltage should be used here. in most applications a 100v or greater diode must be used. r gs resistor that turns q n and q p off when no signal is present. r flt pull-down resistor for the open-drain fault circuit.
tripath technology, inc. - technical information 10 tda2075a ? rev. 0.9/kli/10.05 typical performance characteristics thd+n versus output power 0.001 10 0.01 0.1 1 % 1 200 2 5 10 20 50 100 w rl = 4 ? vpp = |vnn| = 30v, 35v and 40v f = 1khz bw = 22hz - 20khz(aes17) 300 thd+n versus frequency 0.001 10 0.01 0.1 % 10 20k 50 100 200 500 1k 2k 5k 10k hz r l = 4 ? pout = 25w / channel v pp = |v nn| = 40v bw = 22hz-22khz 20 thd+n versus output power 0.001 10 0.01 0.1 1 % 1 200 2 5 10 20 50 100 w rl = 6 ? vpp = |vnn| = 30v, 35v and 40v f = 1khz bw = 22hz - 20khz(aes17) 300 thd+n versus frequency 0.001 10 0.01 0.1 % 10 20k 50 100 200 500 1k 2k 5k 10k hz r l = 6 ? pout = 25w / channel v pp = |v nn| = 4 0 v bw = 22hz - 22khz 20 thd+n versus output power 0.001 10 0.01 0.1 1 % 1 200 2 5 10 20 50 100 w rl = 8 ? vpp = |vnn| = 30v, 35v and 40v f = 1khz bw = 22hz - 20khz(aes17) 300 thd+n versus frequency 0.001 10 0.01 0.1 % 10 20k 50 100 200 500 1k 2k 5k 10k hz r l = 8 ? pout = 25w / channel vpp = |vnn| = 40v bw = 22hz-22khz 20
tripath technology, inc. - technical information 11 tda2075a ? rev. 0.9/kli/10.05 typical performance characteristics 0 10 20 30 40 50 60 70 80 90 efficiency (%) 0 25 50 75 100 125 150 output pow er per channel (w) 175 200 225 power dissipation per channel (w) efficiency and power dissipation versus output power 0 5 10 15 20 25 30 35 40 45 vpp = |vnn| = 40v r l = 4 ? f= 1khz bw = 22hz - 20khz(aes17) pow er dissipation efficiency intermodulation performance -140 +0 -100 -80 -60 -40 -20 20 30k 50 100 200 500 1k 2k 5k 10k hz d b r a r l = 8 ? 19khz, 20khz, 1:1 0dbr = 12vrms fft s iz e = 32k fft sr = 65khz vpp = |v nn| = 40v bw = 22hz - 80khz -120 0 10 20 30 40 50 60 70 80 90 efficiency (%) 0 25 50 75 100 125 150 output pow er per channel (w) 175 power dissipation per channel (w) efficiency and power dissipation versus output power 0 2 4 6 8 10 12 14 16 18 vpp = |vnn| = 40v r l = 6 ? f= 1khz bw = 22hz - 20khz(aes17) pow er dissipation efficiency 20 100 noise floor -120 -70 -110 -100 -90 -80 20 20k 50 100 200 500 1k 2k 5k 10k hz v pp = |v nn| = 40v fft size = 32k fft sr = 48khz bw = 22hz-20khz(aes17) d b v 0 10 20 30 40 50 60 70 80 90 efficiency (%) 0255075100125 output pow er per channel (w) power dissipation per channel (w) efficiency and power dissipation versus output power 0 2 4 6 8 10 12 14 16 18 vpp = |vnn| = 40v r l = 8 ? f= 1khz bw = 22hz - 20khz(aes17) pow er dissipation efficiency 100 20 ttt channel separation versus frequency -100 +0 -80 -60 -40 -20 20 20k 50 100 200 500 1k 2k 5k 10k hz d b r a 0dbr = 12vrms v pp = |v nn| = 40v bw = 22hz - 20khz
tripath technology, inc. - technical information 12 tda2075a ? rev. 0.9/kli/10.05 application information figure 1 is a simplified diagram of one channel (cha nnel 1) of a tda2075a amplifier to assist in understanding its operation. oaout1 inv1 c i 45 46 + analog ground power ground v5 agnd 34 ref r ref r vpp1 vpp vnn 40 vppsense 38 vnnsense offset trim circuit - + r vnn1 r vpp2 v5 v5 r vnn2 processing & modulation v10 fbkout1 11 fbkgnd1 12 r l c hbr lo1 15 r g q n ho1 17 r g q p ocsn1 10 ocsp1 9 c s vpp vnn r ofa v5 r ofb c of r f r i r fbb r fbb r fbc r fbc c fb c s r fba r fba v5 output filter biascap c a 3 2.5v c s 32,43,44 41,42 v5 agnd 5v over current detection over/ under voltage detection tda2075a in1 y1b c s 6 5 v5 agnd 5v r s c g c g v10 c s 25 13,24 v10 pgnd 10v fet controller figure 1: simplified tda2075a amplifier tda2075a basic amplifier operation the audio input signal is fed to the processor inter nal to the tda2075a, where a switching pattern is generated. the average idle (no input) switching frequency is approximately 700khz. with an input signal, the pattern is spread spectrum and vari es between approximately 200khz and 1.5mhz depending on input signal level and frequency. these switching patterns are inputted to a mosfet driver and then outputted to ho1 and lo1 which are ac-coupled to a complementary pair of power mosfets. the output of the mosfets is a power-amplified version of the switching pattern that switches between vpp and vnn. this signal is then low-pass filtered to obtain an amplified reproduction of the audio input signal. the processor is operated from a 5-volt supply while the fet driver is operated from a 10-volt supply. the fet driver inserts a ?break-before-make? dead time between the turn-off of one transistor and the turn-on of the other in order to minimize shoot-thr ough currents in the external mosfets. the dead time can be programmed by adjusting r bbmset . feedback information from the output of the complementary fets is supplied to the processor via fbkout1. additional feedback information to account for ground bounce is supplied via fbkgnd1. complementary mosfets are used to formulate a ha lf-bridge configuration for the power stage of the amplifier. the gate capacitors, c g , are used to ac-couple the fe t driver to the complementary mosfets. the gate resistors, r g , are used to control mosfet slew rate and thereby minimize voltage overshoots.
tripath technology, inc. - technical information 13 tda2075a ? rev. 0.9/kli/10.05 circuit board layout the tda2075a is a power (high current) amplifier that operates at relatively high switching frequencies. the output of the amplifier switches between vpp and v nn at high speeds while driving large currents. this high-frequency digital signal is passed through an lc low-pass filter to recover the amplified audio signal. since the amplifier must drive the inductiv e lc output filter and spea ker loads, the amplifier outputs can be pulled above the supply voltage and belo w ground by the energy in the output inductance. to avoid subjecting the tda2075a and the comp lementary mosfets to potentially damaging voltage stress, it is critical to have a good printed circuit boa rd layout. it is recommended that tripath?s layout and application circuit be used for all applications and onl y be deviated from after careful analysis of the effects of any changes. please refer to the tda2075a reference board document, rb-tda2075a, available on the tripath webs ite, at www.tripath.com. the trace that connects the drain of the p-channel output mosfet to the drain of the n-channel output mosfet is very important. this connection should be as wide and short as possible. a jumper wire of 16 gauge or more can be used in parallel with the tr ace to reduce any trace resistance or inductance. any resistance or inductance on this trace can caus e the switching output to over/undershoot potentially causing damage to both the tda2075a and the output mosfets. the following components are important to place ne ar the tda2075a or output mosfet pins. the recommendations are ranked in order of layout im portance, either for proper device operation or performance considerations. - the capacitors, c hbr, provide high frequency bypassing of the amplifier power supplies and will serve to reduce spikes across the supply rails . please note that both mosfet half-bridges must be decoupled separately. in addition, the voltage rating for c hbr should be at least 150v as this capacitor is exposed to the full supply range, vpp-vnn. - c fb removes very high frequency components from the amplifier feedback signals and lowers the output switching frequency by delaying the f eedback signals. in addition, the value of c fb is different for channel 1 and channel 2 to ke ep the average switching frequency difference greater than 40khz. this minimizes in -band audio noise. the capacitors, c fb , should be surface mount types, located on the ?solder? side of the board as close to their respective tda2075a pins as possible. - d ds should be placed as close to the drain and s ource of the output mosfets as possible with direct routing either from the drain of the p- channel mosfet to the source of the n-channel mosfet or from the source of the p-channel mosfet to the drain of the n-channel mosfet. the output over/undershoots are very high-speed transients. if these diodes are placed too far away from the mosfets, t hey will be ineffective. - to minimize noise pickup and minimize thd+n, r fba , r fbb , and r fbc should be located as close to the tda2075a as possible. make sure that the routing of the high voltage feedback lines is kept far away from the input op amps or significant noise coupling may occur. it is best to shield the high voltage feedback lines by using a ground plane around these traces as well as the input section. the feedback and feedba ck ground traces should be routed together in parallel. - the main supply decoupling capacitors, c s , should be located close to the output devices, q n and q p . these will absorb energy when d sd and d ds conduct. also, the bulk decoupling capacitors, c s , will shunt energy generated by the main supply lead trace inductance. some components are not sensitive to location but are very sensitive to layout and trace routing. - for proper over-current detection, the sense lines connected to r s must be kelvin connected directly from the terminals of r s back to ocsp1 (ocsp2) and ocsn1 (ocsn2). the traces should be run in parallel back to the tda2075a pi ns without deviation. improper layout with respect to r s will result in premature over-current detection due to additional ir losses.
tripath technology, inc. - technical information 14 tda2075a ? rev. 0.9/kli/10.05 - to maximize the damping factor and reduce distortion and noise, the modulator feedback connections should be routed directly to the pins of the output inductors. l o . - the output filter capacitor, c o , and zobel capacitor, c z , should be star connected with the load return. the output ground feedback signal should be taken from this star point. - the modulator feedback resistors, r fba and r fbb , should all be grounded and attached to 5v together. these connections will serve to minimize common mode noise via the differential feedback. - the feedback signals that come directly from the output inductors are high voltage and high frequency in nature. if they are routed close to the input nodes, inv1 and inv2, the high impedance inverting op-amp pins will pick up noise. this coupling will result in significant background noise, especially when the input is ac coupled to ground, or an external source such as a cd player or signal generator is connected. thus, care should be taken such that the feedback lines are not routed ne ar any of the input section. - to minimize the possibility of any noise pickup, the trace lengths of inv1 and inv2 should be kept as short as possible. th is is most easily accomplished by locating the input resistors, r i and the input stage feedback resistors, r f as close to the tda2075a as possible. in addition, the offset trim resistor, r ofb , which connects to either inv1, or inv2, should be located close to the tda2075a input section. tda2075a grounding proper grounding techniques are required to maxi mize tda2075a functionality and performance. parametric parameters such as thd+n, noise fl oor and crosstalk can be adversely affected if proper grounding techniques are not implemented on the pcb la yout. the following discussion highlights some recommendations about grounding both with respect to t he tda2075a as well as general ?audio system? design rules. the tda2075a is divided into three sections: the inpu t processor section, the fe t driver section, and the complementary output mosfets (high voltage) section. on the tda2075a evaluation board, the ground is also divided into distinct sections, analog gr ound (agnd) and power ground (pgnd). to minimize ground loops and keep the audio noise floor as low as possible, the two grounds must be only connected at a single point. the ground for the 5v supply is referred to as t he analog ground and must be connected to pins 5, 41, and 42 on the tda2075a. additionally, any external input circuitry such as preamps, or active filters, should be referenced to the analog ground. the substrate, pin 36, should also be connected to the analog ground. for the power section, tripath has traditionally used a ?star? grounding scheme. thus, the load ground returns and the power supply decoupling traces are routed separately back to the power supply. in addition, any type of shield or chassis connection w ould be connected directly to the ground star located at the power supply. these precautions will both minimize audible noise and enhance the crosstalk performance of the tda2075a. it is possible to use a low impedance ground plane for pgnd as well. but the ground plane must be contiguous or ground currents from each channel can create crosstalk issues. to minimize these issues, the fbkout1 (fbkout2) lines should be routed directly from the pgnd side of the load. the tda2075a incorporates a differential feedback system to minimize the effects of ground bounce and cancel out common mode ground noise. therefor e, the feedback from the output ground for each channel needs to be properly sensed. this c an be accomplished by connecting the output ground ?sensing? trace directly to the star formed by the output ground return, output capacitor, c o , and the zobel capacitor, c z . refer to the application / test circuit for a schematic description.
tripath technology, inc. - technical information 15 tda2075a ? rev. 0.9/kli/10.05 tda2075a amplifier gain the gain of the tda2075a is the product of t he input stage gain and the modulator gain for the tda2075a. please refer to the sections, input stage design, and modulator feedback design, for a complete explanation of how to determine the external component values. modulator v inputstage v tda2075a v a * a a = ? ? ? ? ? ? ? ? + + ? 1 r * r ) r (r * r r r a fbb fba fbb fba fbc i f tda2075a v for example, using a tda2075a with the following external components, r i = 20k ? r f = 20k ? r fba = 1k ? r fbb = 1.1k ? r fbc = 10.0k ? v v 20.09 - 1 1.1k ? * 1.0k ? ) 1.1k (1.0k ? * 10.0k ? 20k ? 20k ? a tda2075a v = ? ? ? ? ? ? + ? + ? input stage design the tda2075a input stage is configured as an inverti ng amplifier, allowing the system designer flexibility in setting the input stage gain and frequency respon se. figure 2 shows a typical application where the input stage is a constant gain inverting amplifier. the input stage gain should be set so that the maximum input signal level will drive the input stage output to 4vpp. the gain of the input stage, above the low frequency high pass filter point, is that of a simple inverting amplifier: i f e vinputstag r r a ? = oaout1 inv1 c i 45 46 + v5 agnd r f r i - + oaout2 inv2 c i 2 1 + v5 agnd r f r i - + biascap tda2075a input1 input2 figure 2: tda2075a input stage
tripath technology, inc. - technical information 16 tda2075a ? rev. 0.9/kli/10.05 input capacitor selection c i can be calculated once a value for r i has been determined. c i and r i determine the input low- frequency pole. typically this pole is set below 10hz to minimize attenuation at 20hz. c in is calculated according to: c i = 1 / (2 x f p x r i ) where: r i = input resistor value in ohms (typically 20k ? ) f p = input low frequency pole (typically 3.6hz) modulator feedback design the modulator converts the signal from the input stage to the high-voltage output signal. the optimum gain of the modulator is determined from the maxi mum allowable feedback level for the modulator and maximum supply voltages for the power stage. depe nding on the maximum supply voltage, the feedback ratio will need to be adjusted to maxi mize performance. the values of r fba , r fbb and r fbc (see explanation below) define the gain of the modulator. once these values are chosen, based on the maximum supply voltage, the gain of the modulator will be fixed. for the best signal-to-noise ratio and lowest distor tion, the maximum modulator feedback voltage should be approximately 4vpp. the modulator feedback resistor r fbc should be adjusted so that the modulator feedback voltage is approximately 4vpp. this will keep the gain of the modulator as low as possible and still allow headroom so that the feedback signal does not clip the modulator f eedback stage. increasing the value of r fbc will increase the modulator gain. sometimes increasing the value of r fbc may be necessary to achieve full power for t he amplifier since the input stage will clip at approximately 4vpp. this will ensure that the input stage doesn? t clip before the output stage. figure 3 shows how the feedback from the output of the am plifier is returned to the input of the modulator. the input to the modulator (fbkout1/fbkgnd1 for channel 1) can be viewed as inputs to an inverting differential amplifier. r fba and r fbb bias the feedback signal to approximately 2.5v and r fbc scales the large out1/out2 signal to down to 4vpp. fbkgnd1 fbkout1 1/2 tda2075a processing & modulation r fba r fba r fbb r fbb r fbc r fbc out1 out1 ground v5 agnd figure 3: modulator feedback
tripath technology, inc. - technical information 17 tda2075a ? rev. 0.9/kli/10.05 for split-supply operation: the modulator feedback resistors are: ? = 1k typically specified, user r fba 4) - (vpp vpp * r r fba fbb = 4 vpp * r r fba fbc = 1 r * r ) r (r * r a fbb fba fbb fba fbc modulator - v + + the above equations assume that vpp=|vnn|. for example, in a system with a split-supply of vpp max =40v and vnn max =-40v, r fba = 1k ? , 1% r fbb = 1.111k ? , use 1.1k ? , 1% r fbc = 10.0k ? , use 10.0k ? , 1% the resultant modulator gain is: 20.09v/v 1 1.1k ? * 1.0k ? ) 1.1k (1.0k ? * 10.0k ? a modulator - v = + ? + for single-supply operation: the modulator feedback resistors are: ? = 1k typically specified, user r fbb 1000 * 350 r fbc ? = vpp ) r (1000 r * 2333.33 r fbc fbc fbb + = 1 r * r ) r (r * r a fbb fba fbb fba fbc modulator - v + + for example, in a system with a single-supply of vpp max = 40v, r fba = 2.17k ? , use 2.15k ? , 1% r fbb = 1k ? , 1% r fbc = 13.0k ? , use 13.0k ? , 1% the resultant modulator gain is: 20.05v/v 1 2.15k ? * 1.0k ? ) 2.15k (1.0k ? * 13.0k ? a modulator - v = + ? +
tripath technology, inc. - technical information 18 tda2075a ? rev. 0.9/kli/10.05 dc offset while the dc offset voltages that appear at the spea ker terminals of a tda2075a amplifier are typically small, tripath recommends that all offsets be removed with the circuit shown in figure 4. it should be noted that the dc voltage on the output of a muted td a2075a with no load is approximately 2.5v. this offset does not need to be nulled. the output impedanc e of the amplifier in mute mode is approximately 10k ? thus explaining why the dc voltage drops to ess entially zero when a typical load is connected. figure 4: offset adjustment mute when a logic high signal is supplied to mute, both amplifier channels are muted (complementary mosfets are turned off). when a logic level low is supplied to mute, both amplifiers are fully operational. there is a delay of approximately 240 milliseconds between the de-assertion of mute and the un-muting of the tda2075a. turn-on & turn-off noise if turn-on or turn-off noise is present in a tda2075a amplifier, the cause is frequently due to other circuitry external to the tda2075a. the tda2075a has additional circuitry, as compared to previous tripath amplifiers, which virtually eliminate any tr ansients during power up and power down. while the tda2075a has sophisticated circuitry to suppress turn -on and turn-off transients, the combination of the power supply and other audio circuitry with the tda2 075a in a particular application may exhibit audible transients. it is recommended that mute is active (pulled high) during power up and power down to minimize any audible transients caused by audio circuitry that precedes the tda2075a. over-current protection the tda2075a has over-current protection circuitry to protect itself and the output transistors from short- circuit conditions. the tda2075a sens es the voltage across resistor r s to detect an over-current condition. resistor r s is in series with the load just after the low pass filter. the voltage is measured via ocsp1 and ocsn1 for channel 1 and ocsp2 and ocsn2 fo r channel 2. the ocs* pins must be kelvin connected for proper operation. see ?circuit board layout? in application information for details. when the voltage across r s becomes greater than v toc (typically 0.5v), the tda2075a will shut off the output stages of its amplifiers. the occurrence of an over-current condition also causes the tda2075a fault pin (pin 30) to go high. it is recommended that the fault pin be connected externally to the mute pin to mute the processor during an over-current condition. the fault circuitry is an open drain configuration and requires a pull-down resistor. the removal of t he over-current condition returns the amplifier to normal operation. v5 10k ? 0.1uf, 50v 470k ? 20.0k ? input to tda2075a r (dc bias ~2.5v) 470k ? i 2.2uf, 25v c i +
tripath technology, inc. - technical information 19 tda2075a ? rev. 0.9/kli/10.05 setting over-current threshold r s determines the value of the over-current threshold, i sc : i sc = v toc /r s where r s is in ? ?s v toc = over-current sense threshold voltage (see electrical characteristics table) = 0.55v typically for example, to set an i sc of 11a, r s will be 50m ? . over- and under-voltage protection the tda2075a senses the power rails through exte rnal resistor networks connected to vnnsense and vppsense. the over- and under-v oltage limits are determined by the va lues of the resistors in the networks, as described in the table ?test/applicat ion circuit component values?. if the supply voltage falls outside the upper and lower limits determined by the resistor networks, the tda2075a shuts off the output stages of the amplifiers. the removal of t he over-voltage or under-voltage condition returns the tda2075a to normal operation. please note that trip points specified in the electrical characteristics table are at 25 c and may change over temperature. the tda2075a has built-in over and under voltage pr otection for both the vpp and vnn supply rails. the nominal operating voltage will typically be chosen as the supply ?center point.? this allows the supply voltage to fluctuate, both above and below, the nominal supply voltage. vppsense (pin 40) performs the over and undervolt age sensing for the po sitive supply, vpp. vnnsense (pin 38) performs the same function for the negative supply, vnn. when the current through vppsense (or vnnsense) goes below or above the val ues shown in the electrical characteristics section (caused by changing the power supply voltage), the tda2075a will be muted. vppsense is internally biased at 2.5v and vnnsense is biased at 1.25v. in a single-supply application, vnnsense should be disabled by connecting a 16k ? resistor for pin 38 to agnd. once the supply comes back into the supply voltage operating range (as defined by the supply sense resistors), the tda2075a will automatically be un-muted and will begin to amplify. there is a hysteresis range on both the vppsense and vnnsense pins. if the amplifier is powered up in the hysteresis band, the amplifier will be muted. t herefore, the usable supply range is the difference between the over- voltage turn-off and under-volt age turn-off for both the vpp and vnn supplies. it shou ld be noted that the supply voltage must be outside of the user defin ed supply range for greater than 200ms for the tda2075a to be muted. figure 5 shows the proper connecti on for the over / under voltage sense circuit for both the vppsense and vnnsense pins. r vpp2 vnn 40 38 r vnn1 r vpp1 v5 r vnn2 vppsense vnnsense vpp v5 tda2075a figure 5: over / under voltage sense circuit
tripath technology, inc. - technical information 20 tda2075a ? rev. 0.9/kli/10.05 the equation for calculating r vpp1 is as follows: vppsense vpp1 i vpp r = set vpp1 vpp2 r r = . the equation for calculating r vnnsense is as follows: vnnsense vnn1 i vnn r = set vnn1 vnn2 r 3 r = . i vppsense or i vnnsense can be any of the currents shown in t he electrical characteristics table for vppsense and vnnsense, respectively. the two resistors, r vpp2 and r vnn2 compensate for the internal bias points. thus, r vpp1 and r vnn1 can be used for the direct calculation of the actual vpp and vnn trip voltages without considering the effect of r vpp2 and r vnn2 . using the resistor values from above, the act ual minimum over voltage turn off points will be: rn_off) (min_ov_tu vppsense vpp1 n_off min_ov_tur i r vpp = ) i r ( vnn rn_off) (min_ov_tu vnnsense vnn1 n_off min_ov_tur ? = the other three trip points can be calculated us ing the same formula but inserting the appropriate i vppsense (or i vnnsense ) current value. as stated earlier, t he usable supply range is the difference between the minimum overvoltage turn off and maximu m under voltage turn-off for both the vpp and vnn supplies. n_off max_uv_tur n_off min_ov_tur range vpp - vpp vpp = n_off max_uv_tur n_off min_ov_tur range vnn - vnn vnn = output transistor selection the key parameters to consider when selecting what n-channel and p-channel mosfets to use with the tda2075a are drain-source breakdown voltage (bvdss), gate charge (qg), and on-resistance (r ds(on) ). the bvdss rating of the mosfet needs to be selected to accommodate the voltage swing between v spos and v sneg as well as any voltage peaks caused by voltage ringing due to switching transients. with a ?good? circuit board layout, a bvdss that is 50% higher than the vpp to vnn voltage swing is a reasonable starting point. the bvdss rating should be verified by measuring the actual voltages experienced by the mosfet in the final circuit. ideally a low qg (total gate charge) and low r ds(on) are desired for the best amplifier performance. unfortunately, these are co nflicting requirements since r ds(on) is inversely proportional to qg for a typical mosfet. the design trade-off is one of cost versus performance. a lower r ds(on) means lower i 2 r ds(on) losses but the associated higher qg translates into hi gher switching losses (losses = qg x 10 x 1.2mhz). a lower r ds(on) also means a larger silicon die and higher cost. a higher r ds(on) means lower cost and lower switching losses but higher i 2 r dson losses. gate resistor selection the gate resistors, r g , are used to control mosfet switching rise/fall times and thereby minimize voltage overshoots. they also di ssipate a portion of the power resulting from moving the gate charge
tripath technology, inc. - technical information 21 tda2075a ? rev. 0.9/kli/10.05 each time the mosfet is switched. if r g is too small, excessive heat can be generated in the driver. large gate resistors lead to slower mosfet switching edges which require a larger break-before-make (bbm) delay. break-before-make (bbm) timing control the complementary half-bridge power mosfets requ ire a deadtime between when one transistor is turned off and the other is turned on (break-before-ma ke) in order to minimize shoot through currents. the tda2075a has an analog input pin that contro ls the break-before-make timing of the output transistors. connecting r bbm from the bbmset pin (pin 7) to analog ground creates a current that defines the bbm setting by the following equation. bbm (nsec) = 2 x r bbm + 7 where r bbm is in k ? ?s and 5k ? < r bbm * < 100k ? * an r bbm of 0 ? will yield a bbm setting of 0nsec. there is tradeoff involved in making this setting. as the delay is reduced, distortion levels improve but shoot-through and power dissipation increase. all typical curves and performance information were done with using a r bbm . the actual amount of bbm required is dependent upon other component values and circuit board layout, the value selected should be veri fied in the actual application circuit/board. it should also be verified under maximum temperature and power conditions since shoot-through in the output mosfets can increase under these conditions, possibly requiring a higher bbm setting than at room temperature. recommended mosfets the following devices are capable of achieving full perf ormance, both in terms of distortion and efficiency, for the specified load impedance and voltage range. additional devices will be added as subsequent characterization is completed. device information ? recommended mosfets part number manufacturer bv dss (v) i d (a) q g (nc) r ds(on) ( ? ) package fqp13n10 fairchild semiconductor 100 12.8 12 0.142 to220 fqp12p10 fairchild semiconductor -100 -11.5 21 0.240 to220 output filter design one advantage of tripath amplifiers over pwm solu tions is the ability to use higher-cutoff-frequency filters. this means load-dependent peaking/droop in t he 20khz audio band potentially caused by the filter can be made negligible. this is especially important for applications where the user may select a 6-ohm or 8-ohm speaker. furthermore, speakers are not purely resistive loads and the impedance they present changes over frequency and from speaker model to speaker model. tripath recommends designing the filter as a 2nd order lc filter. tripath has obtained good results with l f = 11uh and c f = 0.22uf. the core material of the output filter inductor has an effect on the distortion levels produced by a tda2075a amplifier. tripath recommends low-mu type-2 iron powder cores because of their low loss and high linearity (available from micrometals, www.micrometals.com ). please refer to the rb- tda2075a for the specific core used. tripath also recommends that an rc damper be used after the lc low-pass filter . no-load operation of a tda2075a amplifier can create significant peaking in the lc filter, which produces strong resonant currents that can overheat the output mosfet s and/or other components. the rc dampens the peaking and prevents problems. tripath has obtained good results with r z = 20 ? and c z = 0.22uf.
tripath technology, inc. - technical information 22 tda2075a ? rev. 0.9/kli/10.05 low-frequency power supply pumping a potentially troublesome phenomenon in single-ended sw itching amplifiers is power supply pumping. this phenomenon is caused by current from the output filter inductor flowing into the power supply output filter capacitors in the opposite direction as a dc load would drain current from them. under certain conditions (usually low-frequency input signals), th is current can cause the supply voltage to ?pump? (increase in magnitude) and eventua lly cause over-voltage/under-volt age shut down. moreover, since over/under-voltage are not ?latched? shutdowns, the effect would be an amplifier that oscillates between on and off states. if a dc offset on the order of 0.3v is allowed to develop on the output of the amplifier (see ?dc offset adjust?), the supplies can be boost ed to the point where the amplifier?s over-voltage protection triggers. one solution to the pumping issue is to use large power supply capacitors to absorb the pumped supply current without significant voltage boost. the low-fr equency pole used at the input to the amplifier determines the value of the capacitor re quired. this works for ac signals only. a no-cost solution to the pumping problem uses the fact that music has low frequency information that is correlated in both channels (it is in phase). this info rmation can be used to eliminate boost by putting the two channels of a tda2075a amplifier out of phase with each other. this works because each channel is pumping out of phase with the other, and the net effect is a cancellation of pum ping currents in the power supply. the phase of the audio signals needs to be corre cted by connecting one of the speakers in the opposite polarity as the other channel. performance measurements of a tda2075a amplifier tripath amplifiers operate by modulating the input si gnal with a high-frequency switching pattern. this signal is sent through a low-pass filter (external to the tda2075a) that demodulates it to recover an amplified version of the audio input. the frequency of the switching pattern is spread spectrum and typically varies between 200khz and 1.5mhz, which is well above the 20hz ? 22khz audio band. the pattern itself does not alter or distort the audio input signal but it does introduce some inaudible noise components. the measurements of certain performance parameters, particularly those that have anything to do with noise, like thd+n, are significantly a ffected by the design of the low-pa ss filter used on the output of the tda2075a and also the bandwidth setting of the meas urement instrument used. unless the filter has a very sharp roll-off just past the audio band or the ba ndwidth of the measurement instrument ends there, some of the inaudible noise components introduced by the tripath amplifier switching pattern will get integrated into the measurement, degrading it. tripath amplifiers do not require large multi-pole filters to achieve excellent performance in listening tests, usually a more critical factor than performance me asurements. though using a multi-pole filter may remove high-frequency noise and improve thd+n ty pe measurements (when they are made with wide- bandwidth measuring equipment), these same filters can increase distortion due to inductor non-linearity. multi-pole filters require relatively large inductors, and inductor non-linear ity increases with inductor value.
tripath technology, inc. - technical information 23 tda2075a ? rev. 0.9/kli/10.05 package information
tripath technology, inc. - technical information 24 tda2075a ? rev. 0.9/kli/10.05 preliminary information ? this pr oduct is still in development. tr ipath technology inc. reserves the right to make any changes without further not ice to improve reliability, function, or design. this data sheet contains the design specifications for a product in development. specifications may change in any manner without notice. tripath and di gital power processing are trademarks of tripath technology inc. other trademarks referenced in this document are owned by their respective companies . tripath technology inc. reserves the right to make changes without further notice to any products herein to improve reliability, function or design. tripath does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. tripath?s products are not authorized for use as criti cal components in life support devices or systems without the express written consent of the president of tripath technology inc. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in th is labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whos e failure to perform can be reasonably expected to cause the failure of the life s upport device or system, or to affect its safety or effectiveness. contact information tripath technology, inc 2560 orchard parkway, san jose, ca 95131 408.750.3000 - p 408.750.3001 - f for more sales information, please visit us @ www.tripath.com/cont_s.htm for more technical information, please visit us @ www.tripath.com/data.htm

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